1. Field of Invention
The present invention relates to a method for fabricating a package. More particularly, the present invention relates to a method for fabricating a wafer-level chip package.
2. Description of Related Art
Along with the trends of electronic devices toward lighter and more compact, the semiconductor chip corresponding to the electronic device has a reduced size and increased wiring density. Therefore, it is more difficult and challenging to fabricate a semiconductor chip package in the subsequent process for the semiconductor chip. Wafer-level chip package is a method of packaging the semiconductor chip, which the method means all the chips are packaged and tested after completion of manufacturing these chips on the wafer, and then the wafer is cut into single chip packages. Since the size of the semiconductor chip is decreased and the functional density on the semiconductor chip is increased, the wiring density of the redistribution layer on the semiconductor chip should be increased correspondingly. Generally, a complicated electro-deposited photoresist technique is applied to complete the lithography process of the high-density redistribution layer. However, the process often leaves metal residues on sides of the chip package, which brings in defects and thus water infiltration to the packaged product. Accordingly, a more reliable electronic device package and a fabrication method thereof, which is more suitable for mass production, have become one of important issues in electronics industry.